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Z80ppc 160.sit
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z80.h
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1995-11-19
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8KB
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219 lines
/* Z80 Emulator: header file
Copyright (C) 1995 G.Woigk
This file is part of Mac Spectacle and it is free software
See application.c for details
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*/
#if CMD_PROFILE
extern Boolean count_instr;
extern long *cnt_xx;
extern long *cnt_cb;
extern long *cnt_ed;
extern long *cnt_xy;
extern long *cnt_xycb;
#endif
#if PC_PROFILE
extern Boolean count_pc;
extern long *cnt_pc;
#endif
// ----- Accessing the Core ---------------------------------------------------------
extern Char* RdPtr ( Short addr ); // get pointer for reading
extern Char* WrPtr ( Short addr ); // get pointer for writing
extern Char Peek ( Short addr ); // read byte
extern Poke ( Short addr, Char byte ); // write byte
// ----- Block copying inside/from/to core -------------------------------------------
extern long tfu; // bytes actually transferred if OSErr!=ok
extern OSErr Buffer2File ( void* bu, short fileID, long len );
extern OSErr File2Buffer ( short fileID, void* bu, long len );
extern OSErr Core2File ( Short addr, short fileID, long len );
extern OSErr File2Core ( short fileID, Short addr, long len );
extern Core2Buffer ( Short addr, void* bu, long len );
extern Buffer2Core ( void* bu, Short addr, long len );
extern Core2Core ( Short src, Short dest, long len );
extern Buffer2Buffer ( void* src, void* dest, long len );
// ----- Flag tables ----------------------------------------------------------------
extern Char zlog_flags[256]; // convert: A register -> z80 flags with V=parity and C=0
#if !GENERATINGPOWERPC
extern Char mlog_flags[256]; // convert: A register -> m68 flags with V=parity and C=0
extern Char z80flags[256]; // convert: m68 flag byte -> Z80 flag byte
extern Char m68flags[256]; // convert: Z80 flag byte -> m68 flag byte
#endif
// ----- The Z80 core --------------------------------------------------------------
extern Char** CORE_M; // master handle for all allocated RAM and ROM
extern Char* CORE; // do not use any longer!!!
extern Char* rpage[]; // mapped in pages for reading
extern Char* wpage[]; // mapped in pages for writing
extern Char* ram[]; // real RAM pages
extern Char* rom[]; // real ROM pages
extern Char* norom; // dummy page for writing to ROM
extern Char zx128pagectrl; // last byte sent to ZX 128's paging control port
extern ZX128PageCtrl ( Char ); // output byte to zx 128's page control port
// ----- Z80 registers on entry and return of Z80() -----------------------------------
typedef union dreg dreg;
union dreg
{ Short rr;
struct { Char hi,lo; } r;
};
typedef union pair pair;
union pair
{ Char *ptr;
struct { Short corebase; Short reg; } rr;
struct { Short corebase; Char hi,lo; } r;
};
typedef struct z80 z80;
struct z80
{ pair bc,de,hl,ix,iy,pc,sp; // registers
Short bc2,de2,hl2; // registers
Char aa2,a2,aa,a; // A2 & A are stuffed in one long register inside Z80_68k()
Char ff2, f2, ff, f; // F2 & F are stuffed in one long register inside Z80_68k()
Char i, irptcmd; // irpt vector: i register & byte read from data bus
Char iff1,iff2; // interrupt enable flip flops
Char exit,wuff; // watchdog flag & nmi/irpt flags
Char r, im; // refresh counter & interrupt mode: 0 ... 2
long cycles; // processor T states (count down for interrupt)
long total; // T states since start of Z80 (overflows approx. every 20')
};
extern z80 zreg; // all z80 registers, flags and bits are stored in this struct
// ----- definitions to ease the use of the z80 registers & core:
#define CYCLES zreg.cycles // processor T states (count down for interrupt)
#define TOTAL zreg.total // T states since start of Z80 (overflows approx. every 20')
#define WUFF zreg.wuff // watchdog flag
#define EXIT zreg.exit // nmi & irpt flags
#define IFF1 zreg.iff1 // irpt flip flop
#define IFF2 zreg.iff2 // iff1 copy during nmi processing
#define IM zreg.im // interrupt mode: 0 ... 2
#define RR zreg.r // 7 bit DRAM refresh counter
#define RI zreg.i // hi byte of interrupt vector: i register
#define IRPTCMD zreg.irptcmd // lo byte of interrupt vector: read from bus
#define IRPTVEK *(Short*)&RI // interrupt vector in interrupt mode 2
#define RA zreg.a // Z80() uses register variable 'a'
#define RF zreg.f // Z80() uses register variable 'f'
#define RA2 zreg.a2
#define RF2 zreg.f2
#define BC2 zreg.bc2
#define DE2 zreg.de2
#define HL2 zreg.hl2
#define ABC zreg.bc.ptr
#define BC zreg.bc.rr.reg
#define RB zreg.bc.r.hi
#define RC zreg.bc.r.lo
#define ADE zreg.de.ptr
#define DE zreg.de.rr.reg
#define RD zreg.de.r.hi
#define RE zreg.de.r.lo
#define AHL zreg.hl.ptr
#define HL zreg.hl.rr.reg
#define RH zreg.hl.r.hi
#define RL zreg.hl.r.lo
#define AIX zreg.ix.ptr
#define IX zreg.ix.rr.reg
#define XH zreg.ix.r.hi
#define XL zreg.ix.r.lo
#define AIY zreg.iy.ptr
#define IY zreg.iy.rr.reg
#define YH zreg.iy.r.hi
#define YL zreg.iy.r.lo
#define APC zreg.pc.ptr
#define PC zreg.pc.rr.reg
#define PCH zreg.pc.r.hi
#define PCL zreg.pc.r.lo
#define ASP zreg.sp.ptr
#define SP zreg.sp.rr.reg
#define SPH zreg.sp.r.hi
#define SPL zreg.sp.r.lo
#define disabled 0x00 // irpt flags
#define enabled 0xFF // irpt flags
// bits in WUFF:
#define is_nmi 0x80 // non maskable interrupt: handled inside Z80()
#define is_irpt 0x7F // normal interrupt counter: handled inside Z80()
// ----- Return values of Z80() -----------------------------------------------------
#define watchdog_irpt 0 // watchdog exception
#define nimp_instr 1 // not implemented instruction at pc -> stop engine
#define halt_instr 2 // halt instruction encountered at pc-1 -> execute it!
#define rst0_instr 3 // rst 0 instruction encountered at pc-1 -> execute it!
#define irpt_error 4 // not supported interrupt mode/instruction -> stop engine
#define ill_instr2 5 // info: illegal instruction executed at pc-2:
#define ill_instr3 6 // SLL and usual XL,XH,YL,YH opcodes
#define ill_instr4 7 //
#define weird_instr1 8 // info: unusual illegal instruction executed at pc-1:
#define weird_instr2 9 // all other illegals
#define weird_instr3 10 //
#define weird_instr4 11 //
// ----- Constants for Init_Z80() --------------------------------------------------------
extern int z80_hardware; // hardware which is actually emulated
#define zx_48k 1
#define zx_128 2
// ----- Procedures -------------------------------------------------------------------
extern InitZ80 ( int hardware ); // allocate core, init z80
extern short Z80 ( ); // return value states reason why Z80() returned
extern short Z80_T ( ); // same as Z80() but with T cycle counting
extern short Z80_PPC ( ); // same as Z80_T() but written in C
// ----- The following procedures must be supplied by the application program ---------------
extern Do_Output ( Short addr, Char n ); // Output byte to port
Char Do_Input ( Short addr ); // Input byte from port
extern Do_Cycles ( void ); // Count down for T cycles reached 0
extern write_to_rom ( Short A, Char N); // Write byte to ROM (or don't)
extern Z80_Info ( long cc, Short ip );
extern Z80_Info_Irpt( long cc ); // info call to debugger if INFO_IRPT==on
extern Z80_Info_NMI ( long cc ); // info call to debugger if INFO_NMI==on
extern Z80_1st_Loc ( long cc, Short ip ); // info call to debugger if PC_PROFILE==on
extern Z80_1st_Instr ( long cc, Short ip ); // info call to debugger if CMD_PROFILE==on